2019S1
Problem 1
In this problem, integers ranging from to are represented by bits. Answer the following questions.
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Design a Half adder and a Full adder. You can use only AND, OR, and NOT gates.
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Design a circuit as follows. Its inputs are three 16-bit integers , , and . The outputs are two 17-bit integers and such that . Here, you can use only Half adders and Full adders (the number of the adders is not restricted), and no adders can be connected in series.
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Design a circuit as follows. Its inputs are four 16-bit integers , , , and . The outputs are two 17-bit integers and such that . Here, you can use only Half adders and Full adders (the number of the adders is not restricted), and the maximum number of adders connected in series must be minimized.
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Design a circuit as follows. Its inputs are two 8-bit integers and . The outputs are two integers and such that . Here, you can use only Half adders and Full adders (the number of the adders is not restricted) in addition to one-bit multipliers.
在这个问题中,从 到 的整数由 位表示。回答以下问题。
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设计一个半加器和一个全加器。你只能使用 AND、OR 和 NOT 门。
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按如下设计一个电路。其输入为三个 16 位整数 、 和 。输出为两个 17 位整数 和 ,使得 。在这里,你只能使用半加器和全加器(加法器的数量不限),并且不能将加法器串联。
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按如下设计一个电路。其输入为四个 16 位整数 、、 和 。输出为两个 17 位整数 和 ,使得 。在这里,你只能使用半加器和全加器(加法器的数量不限),并且必须最小化串联的加法器的最大数量。
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按如下设计一个电路。其输入为两个 8 位整数 和 。输出为两个整数 和 ,使得 。在这里,你只能使用半加器和全加器(加法器的数量不限),此外还有 的一位乘法器。
Problem 2
We consider a 32-bit machine with 32KB physical memory, upon which the operating system supports the paging functionality. The page size is 4KB, the virtual memory size is 4GB, and there is no cache memory. Answer the following questions. Note that 1KB is equivalent to 1024 bytes.
- (1) Explain each of the following terms regarding the paging functionality, briefly.
- Page
- Page Table
- Page Replacement
- Page Fault
- Translation Look-aside Buffer (TLB)
(2) Obtain the physical address in hexadecimal corresponding to the virtual address of (hexadecimal) when the following page table is given.
Page number (decimal) | Frame number (binary) | Valid bit |
---|---|---|
0 | 111 | 1 |
1 | 000 | 0 |
2 | 110 | 1 |
3 | 000 | 0 |
4 | 101 | 1 |
5 | 000 | 0 |
6 | 000 | 0 |
7 | 000 | 0 |
8 | 000 | 0 |
9 | 001 | 1 |
10 | 100 | 1 |
11 | 000 | 1 |
12 | 011 | 1 |
13 | 000 | 0 |
14 | 000 | 0 |
15 | 010 | 1 |
(3) Obtain the number of page faults caused by executing each of the following two pieces of program code written in C language.
Program Code 1
Program Code 2
Note that each program code is executed under the following assumptions:
- , , and are 32-bit integer variables. is a 32-bit integer 1-dimensional array with elements. The values of and each element of are all set.
- Program code optimization by a compiler is disabled.
- In the initial state, all the pages that are allocated for are not valid. Any data (including the program code and the page table) other than are allocated to some valid page, and it is never paged out.
- Page allocation for the start address of is aligned with a page boundary.
- Page replacement is based on the Least Recently Used (LRU) policy.
我们考虑一台拥有 32KB 物理内存的 32 位机器,操作系统支持分页功能。页面大小为 4KB,虚拟内存大小为 4GB,没有缓存内存。请回答以下问题。注意 1KB 相当于 1024 字节。
- (1) 简要解释以下与分页功能相关的术语。
- 页面
- 页表
- 页面置换
- 页面错误
- 翻译后备缓冲区(TLB)
(2) 在以下页表给出的情况下,获取对应于虚拟地址 (十六进制)的物理地址(十六进制)。
页号 (十进制) | 帧号 (二进制) | 有效位 |
---|---|---|
0 | 111 | 1 |
1 | 000 | 0 |
2 | 110 | 1 |
3 | 000 | 0 |
4 | 101 | 1 |
5 | 000 | 0 |
6 | 000 | 0 |
7 | 000 | 0 |
8 | 000 | 0 |
9 | 001 | 1 |
10 | 100 | 1 |
11 | 000 | 1 |
12 | 011 | 1 |
13 | 000 | 0 |
14 | 000 | 0 |
15 | 010 | 1 |
(3) 获取在以下两段用 C 语言编写的程序代码中执行每段代码时引发的页面错误数量。
程序代码 1
程序代码 2
请注意,每段程序代码都在以下假设条件下执行:
- , 和 是 32 位整数变量。 是一个具有 元素的 32 位整数一维数组。 和 的每个元素的值都已设定。
- 禁用编译器的程序代码优化。
- 在初始状态下,分配给 的所有页面都是无效的。除了 之外的任何数据(包括程序代码和页表)都分配给某个有效页面,并且永远不会被调出。
- 为 的起始地址分配页面时,与页面边界对齐。
- 页面置换基于最近最少使用(LRU)策略。
Problem 3
In the following, we represent a deterministic finite automaton as a quintuple (where is a finite set of states, is a finite set of input symbols, is the transition function, is the initial state, and is the set of final states), and a context-free grammar as a quadruple (where is a finite set of non-terminal symbols, is a finite set of terminal symbols, is a finite set of production rules, and is the start symbol). A context-free grammar is in Chomsky normal form if each production rule is of the form , , or (where is a non-terminal symbol, and are non-terminal symbols other than , is a terminal symbol, and is an empty sequence). We write for the language accepted by a deterministic finite automaton , and for the language generated by a context-free grammar . Answer the following questions.
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Let be a deterministic finite automaton. Give a deterministic finite automaton that accepts the complement of , i.e., . Here, you may assume that is a total function.
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Describe an algorithm that takes a context-free grammar as an input, and decides whether or not .
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Given a context-free grammar in Chomsky normal form and a deterministic finite automaton , we define a context-free grammar by:
Here, assume . Prove that holds.
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Give a method to decide, given a context-free grammar in Chomsky normal form and a deterministic finite automaton as inputs, whether or not . You may use the results of questions (1), (2), and (3).
在以下内容中,我们将确定有限自动机表示为五元组 (其中 是一个有限状态集, 是一个有限输入符号集, 是转移函数, 是初始状态, 是终止状态集),上下文无关文法表示为四元组 (其中 是一个非终结符号的有限集合, 是一个终结符号的有限集合, 是一组产生规则, 是开始符号)。上下文无关文法 处于 Chomsky 范式,如果每个产生规则的形式为 , 或 (其中 是一个非终结符号, 和 是非终结符号, 是一个终结符号, 是一个空序列)。我们用 表示确定有限自动机 接受的语言,用 表示上下文无关文法 生成的语言。请回答以下问题。
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设 是一个确定有限自动机。给出一个确定有限自动机,它接受 的补集,即 。这里,你可以假设 是一个全函数。
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描述一个算法,该算法接受上下文无关文法 作为输入,并决定 与否。
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给定一个 Chomsky 范式的上下文无关文法 和一个确定有限自动机 ,我们定义上下文无关文法 如下:
这里,假设 。证明 成立。
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提供一种方法,判断给定 Chomsky 范式中的上下文无关文法 和一个确定有限自动机 作为输入, 是否成立。你可以使用问题 (1),(2) 和 (3) 的结果。